The present disclosure relates to substrate bonding, and particularly to a fixture for inducing uniform solder reflow and a method of bonding substrates employing the same.
A first substrate can be bonded to a second substrate by employing an array of solder balls. For example, in a solder bonding employing bonding pads, each solder ball contacts a bonding pad on the semiconductor chip and another bonding pad on another semiconductor chip or the packaging substrate. Each bonding pad is a contiguous metal pad, and can be formed out of the last metal layer of a metal interconnect structure during a semiconductor manufacturing sequence. Each bonding pad is large enough to accommodate the bottom portion of a solder ball. Typically, an array of solder balls can be employed to provide input/output (I/O) connections between the semiconductor chip and another semiconductor chip or a packaging substrate.
Connections employing an array of solder balls, such as C4 balls or any other type of solder balls, are susceptible to mechanical stress created by a mismatch in the coefficients of thermal expansion (CTE's) between the semiconductor chip and the other semiconductor chip or the packaging substrate. Such mechanical stress may cause cracks in the solder balls, back-end-of-lines in chips, or the semiconductor chip(s), causing the semiconductor chip(s) to fail during flip chip assembly process and/or usage.
The problem of mechanical stress caused by the mismatch between CTE's are exacerbated when an organic substrate is employed for a packaging substrate because the mismatch of CTE's is greater between organic substrates and semiconductor substrates than between ceramic substrates and semiconductor substrates. When an organic substrate is used as a packaging substrate for a fine pitch flip chip assembly, substrate warpage can occur in the conventional reflow process during which solder balls reflow. This warpage can result in non-wetting of solder bumps and/or bridging between solder bumps, thereby decreasing the assembly yield.
In general, organic substrates expand and contract more than silicon chips. For example, a silicon chip has a CTE of about 2.6 p.p.m./° C., and an organic substrate has a CTE of about 17 p.p.m./° C. Such a mismatch between CTE's can create thermally-induced stress and strain in a bonded flip-chip structure during the flip chip assembly process. Thermally-induced stress and strain in the flip-chip structure during a reflow process often results in a failure of back-end-of-line (BEOL) interconnect structures.
The thermally-induced stress caused by the mismatch between CTE's is greater on C4 balls located on a periphery of the flip-chip structure because the relative lateral displacement of two opposing C4 pads during a cool-down after a reflow increases with distance from the center of the flip-chip structure, and because the cooling rate of the C4 balls at the periphery is greater than the cooling rate of the C4 balls at the center of the flip-chip structure. Such mechanical stress causes C4 balls or other interconnect structures within the organic substrate or the silicon chip to crack, causing electrical failures.